The present invention relates to an apparatus for expanding the memory of an electronic data system, and more particularly for expanding a single or non-paged electronic data system into one with multiple pages.
A recurrent problem of existing electronic data systems is the lack of sufficient memory for expansion of capabilities. Existing electronic data systems usually do not have the capacity to store and operate with such additions as new application programs and extended executive/utility programs. A substantial part of this problem comes from the inability of the existing hardware to accommodate the additional address connections of further memory circuits. Existing systems just do not have extra address lines available to address an expanded memory such as 256 kilobit VLSI RAM circuits.
Each electronic data system is manufactured with a fixed number, N, of conductors in the address bus. This limits the number of of binary memory addresses that can be directly addressed in one cycle to a maximum of two raised to the Nth power, as is well known. Since it is usually economically impractical to increase the size of the address bus on an existing printed circuit board, a number of techniques have been used to access an expanded memory over the existing address bus. These usually consist of a variation of a bank switching or a paging technique.
In this type of paging, each page of memory has the maximum number of addresses directly addressable in one cycle by the existing address bus conductors. Additionally, each page has a page address as well. Thus, to access a memory location the page must first be selected and then all the address locations on that page can be addressed directly. However, these known techniques typically use memory mapped paging with a number of address locations of each page as the page selection addresses. These page selection addresses are decoded by each page to determine which is currently selected. A store to one of the selection addresses activates its corresponding page, and that page remains active until another page is selected. Such systems are shown in U.S. Pat. Nos. 4,432,067 and 4,368,515 issued to Nielsen on Feb. 14, 1984 and Jan. 11, 1983 respectively. Also of this type are the second embodiment of U.S. Pat. No. 4,473,877 issued to Tulk Sep. 25, 1984, and U.S. Pat. No. 4,485,457 issued to Balaska et al. Nov. 27, 1984.
This method uses as many addresses of each page as there are pages in order to provide for this type of memory mapped selection. This puts a number of "dead spots" in each page which the software must accommodate. These "dead spots" in each page require extra programming directions to be included in either the operating system or in the executing program in order for the desired program to run on such a newly paged system.
Many other known methods and apparatus of expansion to bank switched or paged systems use an additional control output line from the central processor to assist in the bank switching or paging. Such systems are described in U.S. Pat. Nos. 4,386,773 issued to Bronstein Jun. 7, 1983, the first embodiment of 4,473,877 issued to Tulk supra, and 4,158,227 issued to Baxter et al. Jun. 12, 1979. The device of Bronstein uses an unspecified control bus line to control the enabling of the the initial decoder and thereafter uses various logic components and delay elements. The device of Baxter et al. uses the Input/Output Write line and the Direct Memory Access lines for page selection. The first embodiment of Tulk also uses an Input/Output line as part of the bank switching/paging control mechanism. The use of other control lines to expand the address space requires unusual code sequences for paging, as well as one or more extra wires added essentially as a further line of the address bus.
It is an object of this invention to provide an existing system with an expanded paged memory without any "dead spot" addresses in the pages.
It is another object of this invention to provide an existing system with an expanded paged memory which uses the same connections as the original smaller memory that it replaces.